Design Flow

Greyrock Technology leverages the Cadence Design Systems tool flow end-to-end for maximum capability and design efficiency. We're also experienced with other design flows, such as Synopsys and Mentor Graphics, and point tools such as HSpice, and can interface with most design flows.

The Greyrock Technology design flow and interaction with a higher-level core or chip design flow proceeds like this

Analog Design Task	Design Tools Used	Output	=>	Mixed-Signal Chip/Core Task
Systems Modeling	MathCAD, MatLab	M-S Placeholder Behavioral Model	=>	Digital HDL
Schematic Entry	Cadence Composer
Circuit Simulation	Cadence Spectre	M-S Block Synthesis Model	=>	Digital Logic Synthesis
System Simulation	Cadence SpectreHDL	Accurate M-S Behavioral Model	=>	Analog Integration
				Mixed-Signal Simulation
Physical Implementation	Cadence Virtuoso	M-S Physical Outline	=>	Core/Chip Place & Route
Parasitic Extraction	Cadence Assura
Physical Verification	Cadence Assura & Spectre	M-S Physical Layout GDS-II	=>	Merge Circuit Layouts
				Analog Refinement
				Tape-out to Samples
Design Validation	Lab Evaluation	Characterization	=>	Performance Validation